Universal Quantum

ASIC Evaluation Engineer

🇬🇧 Haywards Heath, GB Na miejscu Inżynieria, produkcja i budownictwo Pełny etat Opublikowano Kwi 15, 2026
LokalizacjaHaywards Heath, GB
Tryb pracyNa miejscu
Forma zatrudnieniaPełny etat
KategoriaInżynieria, produkcja i budownictwo
Opublikowano15 kwietnia 2026
Ostatnio sprawdzono8 maja 2026

At Universal Quantum, we aim to make the world a better place by engineering the future of computing. Together, we are creating truly impactful quantum computers. Our machines will be capable of solving problems until now considered impossible, with applications ranging across a broad range of industries, including healthcare, materials and aerospace. We are looking to hire an ASIC Evaluation Engineer to join an established ASIC design group working on developing and running measurement solutions to evaluate a range of cryogenic-compatible ASICs and micromachined components. Passionate about helping create technologies which can change the world? We may be the right place for you, so get in touch! 

  

What You’ll Accomplish: 

  • Testing of custom integrated circuits (ASICs) and micromachined assemblies as a primary duty.
  • Design, build and document custom test electronics (PCBs) and test hardware.
  • Write testbenches within in house evaluation environment. Requires solid foundation in Python, Git, coctb and Verilog.
  • Create reports detailing the performance of ASICs at nominal and cryogenic temperatures.
  • Opportunity to work with the IC team on the design of cryogenic ASICs or system-level applications.
  • Maintain the multidisciplinary collaboration with mechanical engineers, software engineers, physicists, working towards a common goal.
  • Play a key role in building test systems for quantum computers.
  • Engage with project planning activities, risk management and scheduling requirements.  
  • Help with fast turn-around proof of concepts and feasibility discussions.
  • Work closely with the IC design team to implement best practices and improve product documentation.
  • Work with silicon at various stages of assembly and work with suppliers to define and produce packaging for chip-specific evaluation.
  • Work with the design team to help identify root causes of functional or performance deviations

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