Senior FPGA Engineer

Job Summary  

Our company is developing a cutting-edge wireless communication system to connect multiple portable devices. Long range, high data rates, low latency, resistance to interferences, and multipath make this problem particularly challenging, giving the candidate unique opportunities to research, design, and implement the next-generation radio communication systems. 

We are looking for an experienced FPGA Design and Verification Engineer to join our dynamic team. In this role, you will be responsible for creating and maintaining comprehensive design and verification flow and come up strategies to ensure the performance and reliability of our FPGA designs. You will have the opportunity to work on cutting-edge projects, leveraging your expertise in Verilog/SystemVerilog, UVM inspired verification flow using CocoTB, and FPGA/VLSI design to deliver high-quality solutions. 

Key Responsibilities: 

• Develop lint-clean RTL modules based on system and algorithmic specifications. 

• Integrate third-party IP blocks and ensure proper functionality within the FGPA system. 

• Review and refine RTL code quality to ensure complete functional coverage. 

• Support the enhancement of internal FPGA design, verification, and testing methodologies. 

• Debug timing issues and contribute to timing closure during STA. 

• Perform on-board debugging and using logic analyzers and related tools.