Technical Programme Manager - QPU

Quantum is now, and it's built here.

Oxford Ionics, now part of IonQ, is pioneering the next generation of quantum computing. Using our world-leading trapped-ion technology, we’re building the most powerful, accurate and reliable quantum systems to tackle problems that today’s supercomputers cannot solve. Joining Oxford Ionics means becoming part of a global IonQ team that is transforming the future of quantum technology - faster, at scale, and with real world impact.

IonQ, Inc. [NYSE: IONQ] is the world’s leading quantum company delivering solutions to solve the world’s most complex problems. IonQ’s newest generation quantum computers, IonQ Tempo and IonQ Forte Enterprise, are the latest in cutting-edge systems that have been helping customers and partners such as Amazon Web Services, AstraZeneca, and NVIDIA achieve 20x performance results. The company achieved 99.99% two-qubit gate fidelity, setting a world record in quantum computing performance in 2025.

The company is accelerating its technology roadmap and intends to deliver the world’s most powerful quantum computers with 2 million qubits by 2030 to accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense. IonQ’s advancements in quantum networking position the company as a leader in building the quantum internet.

What to expect:
You will own the programme execution for silicon device development within our quantum computing roadmap, translating complex technical work into clear plans, measurable milestones, and predictable delivery. This role sits at the centre of a cross-functional environment; working day-to-day with physicists and engineers, and partnering closely with external suppliers and internal stakeholders; to ensure work progresses with pace, clarity, and high attention to detail.

You’ll create and run the operating rhythm that keeps teams aligned and leaders informed: building delivery plans, tracking dependencies, surfacing risks early, and producing decision-ready reporting that senior stakeholders can trust. When priorities shift or technical issues emerge, you’ll drive structure into ambiguity; clarifying scope, coordinating trade-offs, and pushing problems to resolution while continuously improving how we execute across the hardware lifecycle.

• Lead silicon device development programmes (or workstreams), owning scope, schedule, resources, budget, dependencies, and stakeholder alignment using best-practice PM tools.
• Drive cross-functional execution across physics, engineering, and partner teams; identify blockers early and take issues to closure with robust risk mitigation and contingency planning.
• Partner with device designers, physicists, and engineers to ensure designs are feasible, buildable, and aligned to programme milestones and deliverables.
• Establish programme cadences and executive reporting (dashboards, status, decision logs), ensuring senior leaders have accurate, timely, decision-ready information.
• Support continuous improvement of engineering workflows across the hardware lifecycle; travel up to 20% to support on-site collaboration in College Park, MD or Bothell, WA, and at partner sites as needed.